As is known, bandgap reference voltage circuits provide a substantially constant output reference voltage over a range of temperatures. That is, such circuits provide temperature compensation so that the output reference voltage does not vary with temperature. Generally, the output reference voltage is a function of the base to emitter voltage (V.sub.be) of one bipolar transistor and the difference between the base to emitter voltages (.DELTA.V.sub.be) of a pair of bipolar transistors having different current densities associated therewith. The value of the temperature independent reference voltage is adjusted by scaling the .DELTA.V.sub.be term. This arrangement provides the desired temperature compensation since the V.sub.be of a bipolar transistor has a negative temperature coefficient (i.e., the voltage V.sub.be decreases as temperature increases); whereas, the .DELTA.V.sub.be of a pair of bipolar transistors has a positive temperature coefficient associated therewith (i.e., the voltage .DELTA.V.sub.be increases as temperature increases). Thus, the temperature variations of the V.sub.be and the .DELTA.V.sub.be terms establishing the reference voltage ideally cancel, thereby providing a constant output reference voltage with temperature.
As is also known, CMOS integrated circuits have become widely used and thus, there has been a desire for a bandgap reference voltage circuit fabricated in accordance with CMOS techniques. The desirability of CMOS is, in part, due to the generally smaller die area required than with bipolar fabrication. Thus, to take advantage of the strengths of both bipolar and CMOS processing techniques, integrated circuits, including bandgap reference voltage circuits, have been fabricated using a combination of the two techniques to provide what is referred to as BiCMOS circuits.
One such prior art reference voltage circuit is shown in FIG. 1, with the output reference voltage V.sub.REF provided across the series combination of diode-connected bipolar transistor Q12 and resistor R2. More particularly, a current mirror arrangement establishes a reference current I at an input current path including MOS transistor M2, bipolar transistor Q4, and resistor R1. Such current I is "mirrored" in a first output current path including MOS transistor M6 and diode-connected bipolar transistor Q8 and in a second output current path including MOS transistor M10, bipolar transistor Q12, and resistor R2. The current densities of bipolar transistors Q4, Q8 are different, such as may be achieved by scaling the emitter area of transistor Q4 with respect to that of transistor QS. The .DELTA.V.sub.be (Q8, Q4), (i.e., the difference between the base to emitter voltages of transistors Q8 and Q4), is equal to V.sub.T lnX, where V.sub.T is the thermal voltage (i.e., the product of Boltzmann's constant and temperature, divided by the electric charge) and X is the scale factor of the transistor areas. The reference current I and the reference voltage V.sub.REF can be expressed as follows: ##EQU1##
Thus, the reference voltage V.sub.REF is a function of the V.sub.be of a bipolar transistor, here transistor Q12, and the .DELTA.V.sub.be of a pair of bipolar transistors, here transistors Q4 and Q8, with the .DELTA.V.sub.be scaled by the ratio of resistor R2 to R1 to provide a desired temperature independent reference voltage V.sub.REF.
The required resistance for resistor R2 can be found from equation (2) to be: ##EQU2##
From equation (3), it is apparent that the smaller the desired reference current I, the larger the required resistance of R2. Thus, the available die area for resistor R2 may limit the minimum reference current I.